1. Field of the Invention
This invention relates to the field of microprocessors and, more particularly, to typing registers within floating point and multimedia instruction units of microprocessors.
2. Description of the Related Art
Superscalar microprocessors achieve high performance by executing multiple instructions per clock cycle and by choosing the shortest possible clock cycle consistent with the design. As used herein, the term "clock cycle" refers to an interval of time accorded to various stages of an instruction processing pipeline within the microprocessor. Storage devices (e.g. registers and arrays) capture their values according to the clock cycle. For example, a storage device may capture a value according to a rising or falling edge of a clock signal defining the clock cycle. The storage device then stores the value until the subsequent rising or falling edge of the clock signal, respectively. The term "instruction processing pipeline" is used herein to refer to the logic circuits employed to process instructions in a pipelined fashion. Generally speaking, a pipeline comprises a number of stages at which portions of a particular task are performed. Different stages may simultaneously operate upon different items, thereby increasing overall throughput. Although the instruction processing pipeline may be divided into any number of stages at which portions of instruction processing are performed, instruction processing generally comprises fetching the instruction, decoding the instruction, executing the instruction, and storing the execution results in the destination identified by the instruction.
Microprocessors are configured to operate upon various data types in response to various instructions. For example, certain instructions are defined to operate upon an integer data type. The bits representing an integer form the digits of the number. The binary point is assumed to be to the right of the digits (i.e. integers are whole numbers). Another data type often employed in microprocessors is the floating point data type. Floating point numbers are represented by a significand and an exponent. The base for the floating point number is raised to the power of the exponent and multiplied by the significand to arrive at the number represented. While any base may be used, base 2 is common in many microprocessors. The significand comprises a number of bits used to represent the most significant digits of the number. Typically, the significand comprises one bit to the left of the binary point, and the remaining bits to the right of the binary point. The bit to the left of the binary point is not explicitly stored, instead it is implied in the format of the number. Generally, the exponent and the significand of the floating point number are stored. Additional information regarding the floating point numbers and operations performed thereon may be obtained in the Institute of Electrical and Electronic Engineers (IEEE) Standard 754. IEEE Standard 754 is herein incorporated by reference in its entirety.
Floating point numbers can represent numbers within a much larger range than can integer numbers. For example, a 32 bit signed integer can represent the integers between 2.sup.31 -1 and -2.sup.31, when two's complement format is used. A single precision floating point number as defined by IEEE Standard 754 comprises 32 bits (a one bit sign, 8 bit biased exponent, and 24 bits of significand) and has a range from 2.sup.-126 to 2.sup.127 in both positive and negative numbers. A double precision (64 bit) floating point value has a range from 2.sup.-1022 and 2.sup.1023 in both positive and negative numbers. Finally, an extended precision (80 bit) floating point number has a range from 2.sup.-16382 to 2.sup.16383 in both positive and negative numbers.
The expanded range available using the floating point data type is advantageous for many types of calculations in which large variations in the magnitude of numbers can be expected, as well as in computationally intensive tasks in which intermediate results may vary widely in magnitude from the input values and output values. Still further, greater precision may be available in floating point data types than is available in integer data types.
Several special floating point data representations are defined. These special floating point data representations are referred to as "special floating point numbers." Special floating point numbers may include special encodings for zero, + and - infinity, denormalized numbers, and not a number (NaN). NaNs may include signaling NaNs (SNaNs) and quiet NaNs (QNaNs). Quiet NaNs may be output as a response to an invalid operation or as the result of an operand in which at least one operand is a QNaN. Signaling NaNs are typically not generated by an FPU. A programmer can use an SNaN to trap into the exception handler and the bit combination of the SNaN can be used to pass information to the exception handler. Specific encodings are assigned for each special floating point number. To determine whether a floating point number is a special floating point number, it is necessary to decode the floating point number to determine if the bit pattern (i.e. the bits that comprise the significand, exponent and sign bit) represents a special encoding.
Another data type employed in microprocessors is the multimedia data type. Multimedia numbers are typically operands or results of multimedia extension, or MMX, instructions. MMX instructions are oriented to highly parallel operations, such as video processing, audio processing and graphical data processing. Multimedia operations have typically been handled by separate sound and/or video cards. Handling the multimedia operations on-board the microprocessor can dramatically speed up multimedia applications such as graphics, audio, speech recognition, video and data compression programs.
In one implementation, the circuitry that executes the multimedia instructions uses the same registers as the floating point unit. A register may store either a floating point register value or a multimedia register value.
It is not advisable to use a multimedia register value as an operand to a floating point instruction. The circuitry that executes the floating point instruction may rely upon the type field of an operand to identify whether the operand is a special floating number such as zero or infinity. For example, a multimedia register value may store a bit pattern that corresponds to the bit pattern representation of a floating point infinity. Because the floating point unit may depend upon the type value to identify an operand as infinity, performing a floating point operation on the multimedia register value without the appropriate floating point type may yield unpredictable results. Further, it is undesirable to include logic to decode an encode type value. Extra logic adversely effects the frequency of the processor.
To prevent the undesirable effects of performing floating point operations on multimedia registers, an instruction is defined to purge multimedia data, or empty the multimedia state, from the registers. For example, the instruction may mark all registers as empty. If a floating point instruction attempts to perform an operation on a register marked as empty, an overflow or underflow stack exception is generated. Ideally, the instruction that purges the multimedia data, or empties the multimedia state, is executed prior to any floating point operation that follows a multimedia operation. However, a situation is contemplated where a user or programmer will inadvertently or purposely fail to execute the empty multimedia state instruction prior to executing a floating point instruction. What is desired is a method and apparatus that ensures predictable results when executing a floating point operation following a multimedia operation independent of a user's or programmer's actions.